microzed Master XDC

Zedboard.orgでノーマルZedboardのMaster XDCは公開されているものの、microzedは現時点で無い。
しょうがないので、手作業でDIP SWとPsuh SW、LEDの分は作ったがめんどくさ過ぎるので、Excelで順に引いていって作った。

一応置いておく。

set_property PACKAGE_PIN T19 [get_ports EEPROM ]
set_property PACKAGE_PIN K17 [get_ports BB_CLK ]
set_property PACKAGE_PIN K18 [get_ports BB_CLK_EN ]
set_property PACKAGE_PIN M14 [get_ports DSW[0] ]
set_property PACKAGE_PIN M15 [get_ports DSW[1] ]
set_property PACKAGE_PIN K16 [get_ports DSW[2] ]
set_property PACKAGE_PIN J16 [get_ports DSW[3] ]
set_property PACKAGE_PIN T10 [get_ports JA_0_1_N ]
set_property PACKAGE_PIN T11 [get_ports JA_0_1_P ]
set_property PACKAGE_PIN U12 [get_ports JA_2_3_N ]
set_property PACKAGE_PIN T12 [get_ports JA_2_3_P ]
set_property PACKAGE_PIN W13 [get_ports JA_4_5_N ]
set_property PACKAGE_PIN V12 [get_ports JA_4_5_P ]
set_property PACKAGE_PIN T15 [get_ports JA_6_7_N ]
set_property PACKAGE_PIN T14 [get_ports JA_6_7_P ]
set_property PACKAGE_PIN Y17 [get_ports JB_0_1_N ]
set_property PACKAGE_PIN Y16 [get_ports JB_0_1_P ]
set_property PACKAGE_PIN Y14 [get_ports JB_2_3_N ]
set_property PACKAGE_PIN W14 [get_ports JB_2_3_P ]
set_property PACKAGE_PIN U17 [get_ports JB_4_5_N ]
set_property PACKAGE_PIN T16 [get_ports JB_4_5_P ]
set_property PACKAGE_PIN W15 [get_ports JB_6_7_N ]
set_property PACKAGE_PIN V15 [get_ports JB_6_7_P ]
set_property PACKAGE_PIN P19 [get_ports JC_0_1_N ]
set_property PACKAGE_PIN N18 [get_ports JC_0_1_P ]
set_property PACKAGE_PIN P20 [get_ports JC_2_3_N ]
set_property PACKAGE_PIN N20 [get_ports JC_2_3_P ]
set_property PACKAGE_PIN U20 [get_ports JC_4_5_N ]
set_property PACKAGE_PIN T20 [get_ports JC_4_5_P ]
set_property PACKAGE_PIN W20 [get_ports JC_6_7_N ]
set_property PACKAGE_PIN V20 [get_ports JC_6_7_P ]
set_property PACKAGE_PIN R17 [get_ports JD_0_1_N ]
set_property PACKAGE_PIN R16 [get_ports JD_0_1_P ]
set_property PACKAGE_PIN R18 [get_ports JD_2_3_N ]
set_property PACKAGE_PIN T17 [get_ports JD_2_3_P ]
set_property PACKAGE_PIN V18 [get_ports JD_4_5_N ]
set_property PACKAGE_PIN V17 [get_ports JD_4_5_P ]
set_property PACKAGE_PIN W19 [get_ports JD_6_7_N ]
set_property PACKAGE_PIN W18 [get_ports JD_6_7_P ]
set_property PACKAGE_PIN D18 [get_ports JE_0_1_N ]
set_property PACKAGE_PIN E17 [get_ports JE_0_1_P ]
set_property PACKAGE_PIN D20 [get_ports JE_2_3_N ]
set_property PACKAGE_PIN D19 [get_ports JE_2_3_P ]
set_property PACKAGE_PIN E19 [get_ports JE_4_5_N ]
set_property PACKAGE_PIN E18 [get_ports JE_4_5_P ]
set_property PACKAGE_PIN F17 [get_ports JE_6_7_N ]
set_property PACKAGE_PIN F16 [get_ports JE_6_7_P ]
set_property PACKAGE_PIN L20 [get_ports JF_0_1_N ]
set_property PACKAGE_PIN L19 [get_ports JF_0_1_P ]
set_property PACKAGE_PIN M20 [get_ports JF_2_3_N ]
set_property PACKAGE_PIN M19 [get_ports JF_2_3_P ]
set_property PACKAGE_PIN M18 [get_ports JF_4_5_N ]
set_property PACKAGE_PIN M17 [get_ports JF_4_5_P ]
set_property PACKAGE_PIN J19 [get_ports JF_6_7_N ]
set_property PACKAGE_PIN K19 [get_ports JF_6_7_P ]
set_property PACKAGE_PIN G18 [get_ports JG_0_1_N ]
set_property PACKAGE_PIN G17 [get_ports JG_0_1_P ]
set_property PACKAGE_PIN F20 [get_ports JG_2_3_N ]
set_property PACKAGE_PIN F19 [get_ports JG_2_3_P ]
set_property PACKAGE_PIN H18 [get_ports JG_6_7_N ]
set_property PACKAGE_PIN J18 [get_ports JG_6_7_P ]
set_property PACKAGE_PIN H17 [get_ports JG_4_5_N ]
set_property PACKAGE_PIN H16 [get_ports JG_4_5_P ]
set_property PACKAGE_PIN J14 [get_ports JH_0_1_N ]
set_property PACKAGE_PIN K14 [get_ports JH_0_1_P ]
set_property PACKAGE_PIN G15 [get_ports JH_2_3_N ]
set_property PACKAGE_PIN H15 [get_ports JH_2_3_P ]
set_property PACKAGE_PIN N16 [get_ports JH_4_5_N ]
set_property PACKAGE_PIN N15 [get_ports JH_4_5_P ]
set_property PACKAGE_PIN L15 [get_ports JH_6_7_N ]
set_property PACKAGE_PIN L14 [get_ports JH_6_7_P ]
set_property PACKAGE_PIN Y19 [get_ports JK_0_1_N ]
set_property PACKAGE_PIN Y18 [get_ports JK_0_1_P ]
set_property PACKAGE_PIN W16 [get_ports JK_2_3_N ]
set_property PACKAGE_PIN V16 [get_ports JK_2_3_P ]
set_property PACKAGE_PIN P18 [get_ports JK_4_5_N ]
set_property PACKAGE_PIN N17 [get_ports JK_4_5_P ]
set_property PACKAGE_PIN P16 [get_ports JK_6_7_N ]
set_property PACKAGE_PIN P15 [get_ports JK_6_7_P ]
set_property PACKAGE_PIN U14 [get_ports LED[0] ]
set_property PACKAGE_PIN U15 [get_ports LED[1] ]
set_property PACKAGE_PIN U18 [get_ports LED[2] ]
set_property PACKAGE_PIN U19 [get_ports LED[3] ]
set_property PACKAGE_PIN R19 [get_ports LED[4] ]
set_property PACKAGE_PIN V13 [get_ports LED[5] ]
set_property PACKAGE_PIN P14 [get_ports LED[6] ]
set_property PACKAGE_PIN R14 [get_ports LED[7] ]
set_property PACKAGE_PIN G19 [get_ports PSW[0] ]
set_property PACKAGE_PIN G20 [get_ports PSW[1] ]
set_property PACKAGE_PIN J20 [get_ports PSW[2] ]
set_property PACKAGE_PIN H20 [get_ports PSW[3] ]
set_property PACKAGE_PIN E8 [get_ports PMOD_D0 ]
set_property PACKAGE_PIN E9 [get_ports PMOD_D1 ]
set_property PACKAGE_PIN C6 [get_ports PMOD_D2 ]
set_property PACKAGE_PIN D9 [get_ports PMOD_D3 ]
set_property PACKAGE_PIN E6 [get_ports PMOD_D4 ]
set_property PACKAGE_PIN B5 [get_ports PMOD_D5 ]
set_property PACKAGE_PIN C5 [get_ports PMOD_D6 ]
set_property PACKAGE_PIN C8 [get_ports PMOD_D7 ]
set_property PACKAGE_PIN B20 [get_ports XADC_AD0_N ]
set_property PACKAGE_PIN C20 [get_ports XADC_AD0_P ]
set_property PACKAGE_PIN A20 [get_ports XADC_AD8_N ]
set_property PACKAGE_PIN B19 [get_ports XADC_AD8_P ]
set_property PACKAGE_PIN L16 [get_ports XADC_GIO0 ]
set_property PACKAGE_PIN G14 [get_ports XADC_GIO1 ]
set_property PACKAGE_PIN L17 [get_ports XADC_GIO3 ]
set_property PACKAGE_PIN J15 [get_ports XADC_GIO2 ]

とりあえず、7010とI/Oキャリアボードを組み合わせた時のPMOD端子の分+ボード上のI/Oとペリフェラルの分。
I/Oキャリアボード上に100MHzのクロックが載っている(BB_CLK)が、イネーブル端子(BB_CLK‗EN)をHにしないと発振しないみたい。

個人的にはピン制約とトップ階層のI/Oは回路ネット名でつけておいて、RTLデザインとの関連付けはトップ階層のデザインで行うのが好きだが、ここら辺の作法ってどうなってるんだろう？